{"journal":{"journal_id":8735,"issn":"1063-8210","eissn":"1557-9999","name_en":"IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS","name_short":"IEEE T VLSI SYST","name_zh":null,"first_year":2019,"last_year":2026,"n_years":6,"latest_if":3.2,"latest_if_year":2025,"first_partition":2,"last_partition":2,"trend":"stable","xr_partition":3,"xr_year":2026,"has_warning":false,"has_risk":false,"legacy_only":false,"jcr_quartile":2,"jcr_year":2026,"jcr_subjects":2},"current":{"journal_id":8735,"year":2026,"source":"xinrui","partition":3,"is_top":false,"is_review":false,"oaj":false,"open_access":false,"wos_index":null,"wos_status":"normal","tags":[],"seq":361,"macro":"工程技术"},"meso":[],"history":[{"year":2025,"partition":2,"is_top":false,"macro":"工程技术"},{"year":2023,"partition":2,"is_top":false,"macro":"工程技术"},{"year":2022,"partition":2,"is_top":false,"macro":"工程技术"},{"year":2021,"partition":3,"is_top":false,"macro":"工程技术"},{"year":2020,"partition":2,"is_top":false,"macro":"工程技术"},{"year":2019,"partition":2,"is_top":false,"macro":"工程技术"}],"if_single":[{"if_year":2025,"value":3.2,"edition":2026},{"if_year":2020,"value":2.312,"edition":2021},{"if_year":2019,"value":2.037,"edition":2021},{"if_year":2018,"value":1.946,"edition":2021},{"if_year":2017,"value":1.744,"edition":2020},{"if_year":2016,"value":1.698,"edition":2019},{"if_year":2015,"value":1.245,"edition":2018}],"if_editions":[{"year":2025,"if_avg3":null,"citations":8361.0},{"year":2021,"if_avg3":2.098,"citations":11912.0},{"year":2020,"if_avg3":1.909,"citations":11345.0},{"year":2019,"if_avg3":1.796,"citations":10832.0},{"year":2018,"if_avg3":1.562,"citations":10114.0}],"warnings":[],"aliases":[{"alias":"IEEE T VLSI SYST","alias_type":"short","src":"legacy"},{"alias":"IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS","alias_type":"primary","src":"upgraded"}],"similar":[],"jcr":[{"subject":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","quartile":2,"citations":8361,"index_version":"SCIE","if_value":3.2,"if_year":2025,"year":2026},{"subject":"ENGINEERING, ELECTRICAL & ELECTRONIC","quartile":2,"citations":8361,"index_version":"SCIE","if_value":3.2,"if_year":2025,"year":2026}],"jcr_years":[2026],"jcr_year":2026,"plan":{"cas":[2025,"cas"],"xinrui":[2026,"xinrui"],"jcr":2026,"cas_years":[2025,2023,2022,2021,2020,2019],"xinrui_years":[2026]},"plan_rows":{"cas":{"journal_id":8735,"year":2025,"source":"cas","partition":2,"is_top":false,"is_review":false,"oaj":false,"open_access":false,"wos_index":"SCIE","wos_status":"normal","tags":[],"seq":null,"macro":"工程技术"},"xinrui":{"journal_id":8735,"year":2026,"source":"xinrui","partition":3,"is_top":false,"is_review":false,"oaj":false,"open_access":false,"wos_index":null,"wos_status":"normal","tags":[],"seq":361,"macro":"工程技术"}},"mode":"latest","year":2026,"source":"xinrui","editions":[{"year":2026,"source":"xinrui","partition":3,"seq":361,"macro":"工程技术"},{"year":2025,"source":"cas","partition":2,"seq":null,"macro":"工程技术"},{"year":2023,"source":"cas","partition":2,"seq":null,"macro":"工程技术"},{"year":2022,"source":"cas","partition":2,"seq":null,"macro":"工程技术"},{"year":2021,"source":"cas","partition":3,"seq":null,"macro":"工程技术"},{"year":2020,"source":"cas","partition":2,"seq":null,"macro":"工程技术"},{"year":2019,"source":"cas","partition":2,"seq":null,"macro":"工程技术"}],"submission":{"entry":{"homepage_url":"http://ieeexplore.ieee.org/servlet/opac?punumber=92","submission_url":null,"submission_kind":null,"author_guide_url":null,"confidence":null,"checked_at":null},"cost":{"is_oa":"NO","required":null,"apc_min":null,"apc_max":null,"currency":null,"usd_est":2645.0,"note":null,"waiver":null,"other_charges":null},"timeline":{"first_decision_days":32,"to_accept_days":null,"online_weeks":null,"text":"一审约 32 天","kind":"aggregate","acceptance_rate_pct":null},"publishing":{"publisher":"Institute of Electrical and Electronics Engineers","country":"United States","language":null,"issn_print":null,"issn_electronic":null},"keywords":{"topics":"Low-power high-performance VLSI design; Parallel Computing and Optimization Techniques; Embedded Systems Design Techniques; VLSI and Analog Circuit Testing; Interconnection Networks and Systems; Analog and Mixed-Signal Circuit Design; Advancements in Semiconductor Devices and Circuit Design; VLSI and FPGA Design Techniques; Semiconductor materials and devices; Advanced Memory and Neural Computing; Ferroelectric and Negative Capacitance Devices; Integrated Circuits and Semiconductor Failure Analysis; Advancements in PLL and VCO Technologies; Radiation Effects in Electronics; Radio Frequency Integrated Circuit Design; Physical Unclonable Functions (PUFs) and Hardware Security; 3D IC and TSV technologies; CCD and CMOS Imaging Sensors; Coding theory and cryptography; Advanced Data Storage Technologies; Wireless Body Area Networks; Electromagnetic Compatibility and Noise Suppression; Cryptographic Implementations and Security; Bluetooth and Wireless Communication Technologies; Error Correcting Code Techniques","scope_text":null,"article_types":null},"completeness":68,"updated_at":"2026-09-16T14:23:27.695223+00:00"}}